Multiphase PWM controller is provided | Heisener Electronics
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Multiphase PWM controller is provided

Technology Cover
Fecha de Publicación: 2022-12-14, Intersil

The ISL6244 provides core voltage regulation by parallel driving two to four interlacing synchronous rectification buck-converter channels. The staggered channel timing causes the ripple frequency to increase, which reduces the input and output ripple currents. The reduction of ripple results in lower component costs, lower losses, and smaller implementation area.

Typical application

               


The ISL6244 uses cost - and space-saving rDS(ON) sensing for channel current balancing, active voltage positioning, and overcurrent protection. The output voltage is monitored by an internal differential remote sensing amplifier. The high-bandwidth error amplifier drives the output voltage to match the programmed 5-bit DAC reference voltage. The resulting compensation signal guides the creation of a pulse-width modulation (PWM) signal to control the accompanying Intersil MOSFET driver. The OFS pin allows the DAC voltage to be offset directly from 0V to 100mV using a single external resistor.

Block diagram

        


The whole system was trimmed to ensure the accuracy of the system was ±1%. Outstanding features of the controller IC include dynamic VIDTM technology that allows seamless real-time VID changes without any external components. Battery "feedforward" is provided to allow conventional control schemes to vary the total input voltage. Optional output voltage "droop" or active voltage positioning. When used, it can reduce the size and cost of output capacitors required to support load transients. The threshold sensitive enable input allows startup coordination with an external resistive voltage divider with an Intersil MOSFET driver or any other device powered by a separate power supply. Superior overvoltage protection is achieved by gating on low MOSFETs of all phases to reduce the output voltage.


An undervoltage condition is detected, but PWM operation is not interrupted. The overcurrent condition causes a burp mode response when the controller repeatedly tries to restart. After a certain number of failed startup attempts, the controller latches. A well-powered logic signal indicates when the converter output is between the UV and OV thresholds.

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